The LWS detectors are used in an integrating amplifier configuration in which the
detector current is integrated on the gate of an FET. As the charge on the gate grows,
the bias voltage across the detector decreases, thus reducing the detector current. This
causes the integration ramps to become non-linear. At present the signal current
is extracted by taking the first order coefficient of a second order fit.
However this method breaks down for ramps that become very non-linear.
For bright sources (flux density
greater than 
Jy at 120 microns), for which this method breaks down
using half-second ramps, quarter-second ramps must be used.
Very bright sources, whose flux densities exceed 
Jy
at 120 microns, cause the
detectors themselves to behave erratically. The only way we have to deal with this is
to reduce the initial detector bias.