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Readout and integration time (LW)

For each pixel, the readout circuit has an integration capacitance of 0.12 pF and a MOSFET follower stage with a gain of 0.8. A 3 among 7 coding scheme allows to address the pixels on the 32 outputs lines. We use a double sampling readout scheme, first resetting the output capacitance and measuring this reset level, then integrating and measuring the level at the end of the integration. Reset level and end of integration level are stored and transmitted to ground in 2 separate 32x32 frames. The integration time allowed in flight are: o.28s, 2s, 5s, 10s, or 20s.

The short integration time limitation comes from the on board acquisition system, while long integrations are limited by the glitch rate induced by cosmic rays.



ISOCAM Observer's Manual - V1.0
Tue Oct 31 12:06:23 MET 1995